A) Field of the Invention
The present invention relates to a production process for semiconductor devices such as light emitting diode.
B) Description of the Related Art
Commonly, a light emitting diode (LED) is produced by forming on a substrate a semiconductor multilayer film (semiconductor layer) consisting of an n-type layer, active layer (light emitting layer), p-type layer, and the like, and subsequently forming electrodes on the surfaces of the substrate and the semiconductor multilayer film. In the case of using a growth substrate of an insulating material, an appropriate region of the semiconductor layer is etched by, for instance, reactive ion etching to expose part of the n-type layer, followed by forming an electrode in the n-type layer and another electrode in the p-type layer.
The selection of the material for the growth substrate can have a large influence on the crystal quality of the resulting semiconductor layer. The electric conductivity, thermal conductivity, and light absorption coefficient of the growth substrate, however, can also have an influence on the electric, thermal, and optical characteristics of the resulting light emitting diode. It cannot be expected that a growth substrate suitable for forming a semiconductor layer with good crystal characteristics always serves to produce a semiconductor device that is also good in all other characteristics. Some studies have proposed thin-film LEDs or laser diodes (LDs) that are produced by peeling off the semiconductor layer from the growth substrate and forming electrodes directly on the semiconductor layer that contributes to light emission (for instance, see Domestic re-publication of PCT international application WO98-14986 as Patent document 1, Published Japanese Translation of PCT International Publication JP 2005-516415 as Patent document 2, Japanese Unexamined Patent Publication (Kokai) No. 2000-228539 as Patent document 3, and Japanese Unexamined Patent Publication (Kokai) No. 2004-172351 as Patent document 4). The removal of the growth substrate improves electric, thermal, and optical characteristics. The laser lift-off technique is generally used for the removal of the growth substrate.
Some documents have disclosed inventions of semiconductor device production processes that comprise forming a void-containing layer on a growth substrate, growing an n-type layer, light emitting layer, and p-type layer on it, bonding a support substrate, and then applying an impact to the void-containing layer to peel off the growth substrate (for instance, see Japanese Unexamined Patent Publication (Kokai) No. 2010-153450 as Patent document 5). For the invention described in Patent document 5, a void-containing layer is formed by alternately performing a step for preferred growth in the horizontal direction (in-plane direction of the layer) and a step for preferred growth in the vertical direction (thickness direction of the layer). The openings in the void-containing layer are closed by an n-type layer formed on the void-containing layer.
The semiconductor device production process proposed in Patent document 5 sometimes suffers from a problem as described below.
FIGS. 4A to 4C are cross sections containing a void-containing layer. The problem with the conventional processes is described below with reference to FIGS. 4A to 4C.
Refer to FIG. 4A. A void-containing layer 51 of GaN is located on a growth substrate 50. A material gas G is being supplied to form an n-type layer 52, which is an n-type GaN film, on the void-containing layer 51. Voids 53 are being generated in the void-containing layer 51 and in the n-type layer 52 that is being formed. In the case of FIG. 4A, the voids 53 have large openings R. The voids 53 are being closed as the n-type layer 52 grows in the horizontal direction. At the same time, nitrogen gas (N2) resulting from the decomposition of the semiconductor and the GaN crystals 54 in the voids 53 gets out of the voids 53 through the openings R. When the openings R are large, this N2 gas will not significantly prevent the material gas G from reaching the edge portions of the openings R and have no significant influence on the horizontal growth of the n-type layer 52.
Refer to FIG. 4B. FIG. 4B illustrates a later state of the n-type layer 52 formation following the state in FIG. 4A. The voids 53 are closed gradually as the n-type layer 52 grows. In FIG. 4B, the voids 53 are being closed gradually and the openings R are becoming smaller. As the openings R become smaller, the N2 gas gets out more rapidly from inside the voids 53, preventing the material gas G from reaching the edge portions of the openings R and inhibiting the n-type layer 52 from growing horizontally and closing the voids 53.
FIG. 4C is a cross section illustrating the shape of the voids 53 which are closed as a result of the growth of the n-type layer 52. In this figure, V1 denotes void portions formed when the openings R are large whereas V2 denotes void portions formed when the openings R are small. When the openings R are small to impede the horizontal growth of the n-type layer 52 during its formation, the voids 53 takes much time to close, causing the height the void portions V2, and in turn, that of the voids 53, to increase.
For the invention proposed in the Patent document 5, the n-type layer 52, light emitting layer, and p-type layer are formed, and then the growth substrate 50 is peeled off, followed by polishing those portions of the void-containing layer 51 and the n-type layer 52 that contain the voids 53, thus planarizing the n-type layer 52. In this step, the polishing operation takes much time if the voids 53 are large in height. Furthermore, the portions to be polished in the n-type layer 52 are thicker, and accordingly the formation of the n-type layer 52 needs a longer period of time. A likely solution to the problem is optimizing the growth temperature for the n-type layer 52 to appropriately control the speed of closure of the openings.
FIG. 5 gives a table that summarizes the relations between the growth temperature for the n-type layer 52 and the size of the voids 53. The test was performed at three growth temperatures: 980° C. as low temperature, 1,000° C. as medium temperature, and 1,020° C. as high temperature. When the n-type layer 52 is grown at the medium temperature, the evaporation (decomposition, dissipation) of GaN crystals has a large influence as described above and the voids 53 do not close quickly, causing the n-type layer 52 formation step and the subsequent polishing step to require a long period of time. From the viewpoint of the peeling of the growth substrate 50, however, it can be said that the voids 53 are formed appropriately.
When the n-type layer 52 is grown at the low temperature, for instance, the constituent elements of the void-containing layer 51 do not decompose and dissipate adequately, making it difficult for the voids 53 to grow to a sufficiently large size. This is because the decomposition and dissipation of GaN are necessary for the formation of the voids 53 even during the growth of the n-type layer 52. Thus, the number of the voids 53 formed is small and accordingly the growth substrate 50 may not be peeled smoothly.
Horizontal growth can be promoted if the n-type layer 52 is grown at a high temperature. However, for the voids 53 to become large, the dissipation needs to continue in it during the growth of the n-type layer 52. In the above case, the horizontal growth is promoted and accordingly, the voids 53 are closed so early that the subsequent dissipation is depressed, making it difficult for the voids 53 to become large enough. This, in turn, makes it difficult to achieve a sufficient surface area occupancy on the growth substrate 50 (ratio of the area where the void-containing layer 51 is in contact with the growth substrate 50) required for the peeling of the growth substrate 50 (accordingly, the growth substrate 50 will not be peeled smoothly).
Thus, conventionally, it has been difficult to maintain the height of the voids 53 at a low level while growing the voids 53 to a desired size at an optimized growth temperature for the n-type layer 52.
Here, likely means of maintaining the voids 53 at a small opening ratio (the ratio of the size of the openings R at the top of the voids 53 to the total area of the layer) during the formation of the void-containing layer 51 include, for instance, increasing the thickness of the void-containing layer 51 and increasing the growth temperature during the formation of the void-containing layer 51. The former method is not preferred because the void-containing layer 51 will require a long growth time, accordingly leading to an increased height of the voids 53. With the latter method, not only the opening ratio but also the size of the voids 53 themselves will be small, making it difficult to achieve a sufficient surface area occupancy required for peeling. Thus, conventionally, it has been difficult to maintain the opening ratio at, for instance, about 50% or less while enlarging the voids 53 to an appropriate size.